Serial Wire Debug is a 2-wire protocol designed by ARM for debugging and programming Cortex-M microcontrollers. It replaced JTAG as the standard debug interface for most modern ARM chips.
Compare Debug ProbesSerial Wire Debug (SWD) is a debug and programming interface for ARM processors. It uses just two signal wires — SWDIO (data) and SWCLK (clock) — to give a debug probe full access to the processor's memory, registers, and peripherals.
With SWD, you can:
SWD is supported by virtually every ARM Cortex-M microcontroller — STM32, nRF52, RP2040, SAMD, LPC, EFM32, AT32, and hundreds of others. If you're working with a Cortex-M chip, SWD is almost certainly available.
Only two wires are required. A third (reset) is optional but recommended.
Bidirectional data line. The probe and target take turns driving it (half-duplex). Carries commands, addresses, and data. Directly connected to a GPIO on the debug probe.
Clock signal driven by the probe. Typical speeds: 1-50 MHz depending on the probe and target. The target samples SWDIO on clock edges. Directly connected to a GPIO on the debug probe.
Active-low reset line. Lets the probe hard-reset the target. Not strictly required for SWD, but essential for recovering locked chips or targets in a bad state. Open-drain with a pull-up on the target.
SWD is a packet-based protocol. The debug probe (host) sends a request packet, and the target responds with an acknowledge + data. Everything happens over the single SWDIO line, clocked by SWCLK.
SWD has a two-layer architecture:
When you "flash firmware over SWD", you're sending write transactions through the MEM-AP to the flash controller's registers, which then programs the data into flash memory. When you "set a breakpoint", you're writing to the breakpoint comparator registers in the debug unit (also memory-mapped).
SWD clock speed is set by the probe. Common values:
Higher clock = faster flashing, but the target chip's SWD peripheral has a maximum supported frequency (check the datasheet). Wire length and capacitance matter at higher speeds.
JTAG came first. It uses 4 signals (TCK, TMS, TDI, TDO) plus an optional reset (TRST). SWD was designed by ARM as a lighter alternative specifically for Cortex-M devices.
| Aspect | JTAG | SWD |
|---|---|---|
| Signal count | 4 + optional reset | 2 + optional reset |
| Pin sharing | Dedicated pins | SWDIO/SWCLK share pins with JTAG TMS/TCK |
| Daisy-chain | Yes (scan chain) | No — point-to-point only |
| Debug access | Full (via DAP) | Full (via DAP) — same debug unit |
| Boundary scan | Yes | No |
| Multi-core | Via scan chain | Via multi-drop SWD (ARM ADIv6) |
| Cortex-M support | Yes | Yes |
| Cortex-A/R support | Yes | Some newer chips |
Bottom line: For Cortex-M work, SWD is the standard. Fewer wires, same debug capability. JTAG is still used for Cortex-A, multi-chip boundary scan, and legacy devices. Most modern Cortex-M chips share the SWD and JTAG pins, so the same physical connector supports both — the probe auto-detects or you select the protocol.
ARM defines two standard SWD/JTAG connectors:
10-pin Cortex Debug Connector (1.27 mm pitch):
| 1 VCC | 2 SWDIO/TMS |
| 3 GND | 4 SWCLK/TCK |
| 5 GND | 6 SWO/TDO |
| 7 KEY (no pin) | 8 TDI |
| 9 GND | 10 nRESET |
20-pin legacy JTAG (2.54 mm pitch): The older, larger connector. Still used on evaluation boards and older designs. Carries the same signals plus a few extras. Many probes ship with both connectors or an adapter.
If you're just wiring up to test pads or a custom connector, you only need:
A debug probe is only useful with software that talks to it. The main open-source and commercial tools:
pip install pyocd and go.cargo install probe-rs.All modern embedded IDEs support SWD debugging: VS Code (via cortex-debug extension), CLion, Eclipse CDT, Keil µVision, IAR Embedded Workbench, and Segger Embedded Studio. The IDE typically talks to a GDB server (OpenOCD, pyOCD, J-Link GDB Server) which talks to the probe.
SWD isn't just for development. It's the standard interface for production programming and in-circuit testing of ARM devices.
A production programmer connects to the target via SWD, erases flash, programs the firmware image, verifies the contents, and optionally sets read-out protection (security bits). This takes 1-10 seconds per device depending on image size and flash speed.
Beyond flashing, SWD gives you real-time access to the target's memory map. A test script can:
This is where SWD goes beyond what a simple UART bootloader can do. The test system has full visibility into the target without the target needing any test-specific firmware.
When you need to flash and test many boards in parallel, you need multiple independent SWD connections. Each target gets its own probe (or probe channel). The host software orchestrates all channels simultaneously.
This is the domain of gang programmers (flash only) and dedicated test farms (flash + test + verify). Learn more about multi-target testing →
7 independent channels. Per-channel logic analyser, 3× UART, current measurement, and power control. One USB connection to the host. Designed for production test, not just programming.
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